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 PD - 91432C
RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-2)
Product Summary
Part Number IRHNA7264SE Radiation Level RDS(on) 100K Rads (Si) 0.11 ID 34A
IRHNA7264SE 250V, N-CHANNEL
RAD Hard HEXFET TECHNOLOGY
TM (R)
SMD-2
International Rectifier's RADHardTM HEXFET(R) MOSFET technology provides high performance power MOSFETs for space applications. This technology has over a decade of proven performance and reliability in satellite applications. These devices have been characterized for both Total Dose and Single Event Effects (SEE). The combination of low RDS(on) and low gate charge reduces the power losses in switching applications such as DC to DC converters and motor control. These devices retain all of the well established advantages of MOSFETs such as voltage control, fast switching, ease of paralleling and temperature stability of electrical parameters.
Features:
n n n n n n n n n
Single Event Effect (SEE) Hardened Ultra Low RDS(on) Low Total Gate Charge Proton Tolerant Simple Drive Requirements Ease of Paralleling Hermetically Sealed Surface Mount Light Weight
Absolute Maximum Ratings
Parameter
ID @ VGS = 12V, TC = 25C ID @ VGS = 12V, TC = 100C IDM PD @ TC = 25C VGS EAS IAR EAR dv/dt TJ T STG Continuous Drain Current Continuous Drain Current Pulsed Drain Current Max. Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction Storage Temperature Range Package Mounting Surface Temperature Weight For footnotes refer to the last page
Pre-Irradiation
Units
34 21 136 300 2.4 20 500 34 30 2.5 -55 to 150 300 (for 5 sec.) 3.3 (Typical)
A
W
W/C
V mJ A mJ V/ns
o
C
g
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1
5/31/01
IRHNA7264SE
Pre-Irradiation
Electrical Characteristics @ Tj = 25C (Unless Otherwise Specified)
Parameter
BVDSS Drain-to-Source Breakdown Voltage BV DSS/T J Temperature Coefficient of Breakdown Voltage RDS(on) Static Drain-to-Source On-State Resistance VGS(th) Gate Threshold Voltage gfs Forward Transconductance IDSS Zero Gate Voltage Drain Current
Min
250 -- -- -- 2.5 10 -- -- -- -- -- -- -- -- -- -- -- --
Typ Max Units
-- 0.32 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 4.0 -- -- 0.110 0.123 4.5 -- 50 250 100 -100 220 50 110 35 180 100 120 -- V V/C V S( ) A
Test Conditions
VGS = 0V, ID = 1.0mA Reference to 25C, ID = 1.0mA VGS = 12V, ID = 21A VGS = 12V, ID = 34A VDS = VGS, ID = 1.0mA VDS > 15V, IDS = 21A VDS= 200V ,VGS=0V VDS = 200V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VGS =12V, ID = 34A VDS = 125V VDD =125V, ID =34A, VGS =12V, RG = 2.35
IGSS IGSS Qg Q gs Q gd td(on) tr td(off) tf LS + LD
Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Total Gate Charge Gate-to-Source Charge Gate-to-Drain (`Miller') Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Inductance
nA nC
ns
nH
Measured from the center of drain pad to center of source pad VGS = 0V, VDS = 25V f = 1.0MHz
Ciss C oss C rss
Input Capacitance Output Capacitance Reverse Transfer Capacitance
-- -- --
4000 1300 480
-- -- --
pF
Source-Drain Diode Ratings and Characteristics
Parameter
IS ISM VSD t rr Q RR ton Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time
Min Typ Max Units
-- -- -- -- -- -- -- -- -- -- 34 136 1.4 700 16
Test Conditions
A
V nS C
Tj = 25C, IS = 34A, VGS = 0V Tj = 25C, IF = 34A, di/dt 100A/s VDD 50V
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
Thermal Resistance
Parameter
RthJC RthJ-PCB Junction-to-Case Junction-to-PC board
Min Typ M a x Units
-- -- -- 1.6 0.42 --
C/W
Test Conditions
Soldered to a 1 inch square clad PC board
Note: Corresponding Spice and Saber models are available on the G&S Website. For footnotes refer to the last page
2
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Pre-Irradiation
IRHNA7264SE
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability. The hardness assurance program at International Rectifier is comprised of two radiation environments. Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both pre- and post-irradiation performance are tested and specified using the same drive circuitry and test conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25C, Post Total Dose Irradiation
Parameter
BVDSS VGS(th) IGSS IGSS IDSS RDS(on) RDS(on) VSD Drain-to-Source Breakdown Voltage Gate Threshold Voltage Gate-to-Source Leakage Forward Gate-to-Source Leakage Reverse Zero Gate Voltage Drain Current Static Drain-to-Source On-State Resistance (TO-3) Static Drain-to-Source On-State Resistance (SMD-2) Diode Forward Voltage
100K Rads (Si)
Units
V nA A V
Test Conditions
VGS = 0V, ID = 1.0mA VGS = VDS, ID = 1.0mA VGS = 20V VGS = -20V VDS= 200V, VGS=0V VGS = 12V, ID = 21A VGS = 12V, ID = 21A VGS = 0V, ID = 34A
Min
250 2.0 -- -- -- -- -- --
Max
-- 4.5 100 -100 50 0.11 0.11 1.4
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion Cu Br LET MeV/(mg/cm2)) 28 36.8 Energy (MeV) 285 305 VDS (V) Range (m) @VGS=0V @VGS=-5V @VGS=-10V 43 250 250 250 39 250 250 250 @VGS=-15V @VGS=-20V 250 250 225 210
300 250 200 VDS 150 100 50 0 0 -5 -10 VGS -15 -20 Cu Br
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHNA7264SE
Pre-Irradiation
1000
I D , Drain-to-Source Current (A)
100
10
1
I D , Drain-to-Source Current (A)
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
1000
100
VGS 15V 12V 10V 9.0V 8.0V 7.0V 6.0V BOTTOM 5.0V TOP
10
0.1
5.0V
20s PULSE WIDTH T = 25 C
J 1 10 100
5.0V
1 0.1 1
0.01 0.1
20s PULSE WIDTH T = 150 C
J 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
100
3.0
TJ = 150 C
10
R DS(on) , Drain-to-Source On Resistance (Normalized)
ID = 34A
I D , Drain-to-Source Current (A)
2.5
2.0
TJ = 25 C
1
1.5
1.0
0.1 5 6 7 8
V DS = 50V 20s PULSE WIDTH 10 11 9 12
0.5
0.0 -60 -40 -20
VGS = 12V
0 20 40 60 80 100 120 140 160
VGS , Gate-to-Source Voltage (V)
TJ , Junction Temperature( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
4
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Pre-Irradiation
IRHNA7264SE
8000
VGS , Gate-to-Source Voltage (V)
C, Capacitance (pF)
6000
VGS = 0V, f = 1MHz Ciss = Cgs + Cgd , Cds SHORTED Crss = Cgd Coss = Cds + Cgd
20
ID = 31A
16
VDS = 125V
C iss
4000
12
C oss
8
2000
C rss
4
0 1 10 100
0 0 40 80
FOR TEST CIRCUIT SEE FIGURE 13
120 160 200
VDS , Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
1000
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY R
DS(on)
100
I D , Drain Current (A)
100
10us
TJ = 150 C
10
100us
10
1ms
TJ = 25 C V GS = 0 V
0.6 1.0 1.4 1.8 2.2 2.6 3.0 3.4
1 0.2
1
TC = 25 C TJ = 150 C Single Pulse
1 10 100
10ms
1000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
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5
IRHNA7264SE
Pre-Irradiation
35
VDS VGS RG
RD
30
D.U.T.
+
I D , Drain Current (A)
25
-VDD
20
VGS
Pulse Width 1 s Duty Factor 0.1 %
15
10
Fig 10a. Switching Time Test Circuit
VDS
5
90%
0 25 50 75 100 125 150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response (Z thJC )
D = 0.50 0.20 0.10 0.05 0.02 0.01
0.1
0.01
SINGLE PULSE (THERMAL RESPONSE)
0.001 0.00001
Notes: 1. Duty factor D = t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.1 0.0001 0.001 0.01 1
P DM t1 t2
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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Pre-Irradiation
IRHNA7264SE
1000
EAS , Single Pulse Avalanche Energy (mJ)
1 5V
800
TOP BOTTOM ID 14.A 20.A 31A
VD S
L
D R IV E R
600
RG
D .U .T.
IA S tp
+ - VD D
A
400
VGS 20V
0 .0 1
Fig 12a. Unclamped Inductive Test Circuit
200
0 25 50 75 100 125 150
V (B R )D S S tp
Starting TJ , Junction Temperature( C)
Fig 12c. Maximum Avalanche Energy Vs. Drain Current
IAS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K
QG
12V
.2F .3F
12 V
QGS VG QGD
VGS
3mA
D.U.T.
+ V - DS
Charge
IG
ID
Current Sampling Resistors
Fig 13a. Basic Gate Charge Waveform
Fig 13b. Gate Charge Test Circuit
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7
IRHNA7264SE
Pre-Irradiation
Footnotes:
Repetitive Rating; Pulse width limited by
maximum junction temperature. VDD = 50V, starting TJ = 25C, L= 0.86 mH Peak IL = 34A, VGS = 12V ISD 34A, di/dt 300A/s, VDD 250V, TJ 150C
Pulse width 300 s; Duty Cycle 2% Total Dose Irradiation with VGS Bias.
12 volt VGS applied and VDS = 0 during irradiation per MIL-STD-750, method 1019, condition A. Total Dose Irradiation with V DS Bias. 200 volt VDS applied and VGS = 0 during irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions --SMD-2
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. Data and specifications subject to change without notice. 05/01
8
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